Circuits and Electronics

About The Professor

Anant Agarwal is a professor in the MIT EECS department and a member of CSAIL. He is a fearless leader of the Carbon Project, which is developing new scalable multicore architectures, a new operating system for multicore and clouds called fos, and a distributed, parallel simulator for multicore and clouds called Graphite. He hacks on WebSim in his spare time. WebSim is a prototype of a web-based electronic circuits laboratory. He led the Raw Project at CSAIL, and is a founder of Tilera Corporation. Raw was an early tiled multicore processor with 16 cores.

His previous projects include Sparcle, a coarse-grain multithreaded (CGMT or switch-on-event SOE) microprocessor, Alewife, a scalable distributed shared memory multiprocessor, Virtual Wires, a scalable FPGA-based logic emulation system, LOUD, a beamforming microphone array, Oxygen, a pervasive human-centered computing project, and Fugu, a protected, multiuser multiprocessor.

To contact Professor Agarwal, you may send him e-mail at (agarwal at& cag dot& csail dot& mit dot& edu) or call him at (617) 253-1448. His US mail address is

Professor Anant Agarwal
CSAIL G32-782
MIT
32 Vassar Street
Cambridge, MA 02139